1. Field of the Invention
The present invention relates to an organic electroluminescent device, and more particularly, to a dual panel type organic electroluminescent device and a method of fabricating the same.
2. Discussion of the Related Art
Among flat panel displays (FPDs), organic electroluminescent (EL) devices have been of particular interest in research and development because they are light-emitting type displays having a wide viewing angle as well as a high contrast ratio in comparison to liquid crystal display (LCD) devices. Organic EL devices are lightweight and small, as compared to other types of display devices, because they do not need a backlight. Organic EL devices have other desirable characteristics, such as low power consumption, superior brightness and fast response time. When driving the organic EL devices, only a low direct current (DC) voltage is required. Moreover, a fast response time can be obtained. Unlike LCD devices, organic EL devices are entirely formed in a solid phase arrangement. Thus, organic EL devices are sufficiently strong to withstand external impacts and also have a greater operational temperature range. Moreover, organic EL devices are fabricated in a relatively simple process involving few processing steps. Thus, it is much cheaper to produce an organic EL device in comparison to an LCD device or a plasma display panel (PDP). In particular, only deposition and encapsulation processes are necessary for manufacturing organic EL devices.
FIG. 1 is a cross-sectional view of a related art organic electroluminescent device. Referring to FIG. 1, first and second substrates 10 and 60, which have inner surfaces facing each other and are spaced apart from each other, have a plurality of pixel regions “P.” An array layer “AL” is formed on an inner surface of the first substrate 10. The array layer “AL” includes a driving thin film transistor (TFT) “Td” in each pixel region “P.” A first electrode 48 connected to the driving TFT “Td” is formed on the array layer “AL” in each pixel region “P.” Red, green and blue organic electroluminescent (EL) layers 54 are alternately formed on the first electrode 48. A second electrode 56 is formed on the organic EL layer 54. The first and second electrodes 48 and 56, and the organic EL layer 54 interposed therebetween constitute an organic EL diode “DEL.” The organic EL device is a bottom type device where light is emitted from the organic EL layer 54 through the first electrode 48 and out of the first substrate 10.
The second substrate 60 is used as an encapsulation substrate. The second substrate 60 has a concave portion 62 at its inner center. The concave portion 62 is filled with a moisture absorbent desiccant 64 that removes moisture and oxygen to protect the organic EL diode “DEL.” The inner surface of the second substrate 60 is spaced apart from the second electrode 56. The first and second substrates 10 and 60 are attached with a sealant 70 at a peripheral portion of the first and second substrates 10 and 60.
FIG. 2A is a plan view of an organic electroluminescent device according to the related art. Referring to FIG. 2A, a gate line 22 crosses a data line 42 and a power line 28. The data line 42 and the power line 28 are spaced apart from each other. A pixel region “P” is defined by the gate line 22, the data line 42 and the power line 28. A switching thin film transistor (TFT) “Ts” is disposed adjacent to the crossing of the gate line 22 and the data line 42. A driving TFT “Td” is connected to the switching TFT “Ts” and the power line 28. A storage capacitor “Cst” uses a power electrode 26 extending from the power line 28 as a first capacitor electrode and an active pattern 16 extending from a switching semiconductor layer 31 of the switching TFT “Ts” as a second capacitor electrode.
FIG. 2B is a cross-sectional view taken along line “IIb-IIb” of FIG. 2A. In FIG. 2B, a buffer layer 12 is formed on a first substrate 10. A driving semiconductor layer 14 and an active pattern 16 separated from each other are formed on the buffer layer 12. A gate insulating layer 18 and a gate electrode 20 are sequentially formed on the driving semiconductor layer 14. The driving semiconductor layer 14 includes an active region “IIc” corresponding to the gate electrode 20, and drain and source regions “IId” and “IIe” at both sides of the active region “IIc.”
A first passivation layer 24 is formed on the gate electrode 20 and the active pattern 16. A power electrode 26 corresponding to the active pattern 16 is formed on the first passivation layer 24.
A second passivation layer 30 is formed on the power electrode 26. The first and second passivation layers 24 and 30 have first and second contact holes exposing portions of the drain and source regions “IId” and “IIe,” respectively. Moreover, the second passivation layer 30 has a third contact hole 36 exposing a portion of the power electrode 26.
Drain and source electrodes 40 and 38 are formed on the second passivation layer 30. The drain electrode 40 is connected to the drain region “IId” of the driving semiconductor layer 14 through the first contact hole 32. The source electrode 38 is connected to the source region “IIe” of the driving semiconductor layer 14 through the second contact hole 34 and connected to the power electrode 26 through the third contact hole 36.
A third passivation layer 44 is formed on the drain and source electrodes 40 and 38. The third passivation layer 44 has a drain contact hole 46 exposing a portion of the drain electrode 40. The driving semiconductor layer 14, the gate electrode 20, the drain electrode 40 and the source electrode 38 constitute the driving thin film transistor (TFT) “Td.”
A first electrode 48 connected to the drain electrode 40 through the drain contact hole 46 is formed on the third passivation layer 44. An insulating interlayer 50 having an open portion exposing the first electrode 48 is formed on the first electrode 48. An organic electroluminescent (EL) layer 54 is formed on the insulating interlayer 50. A second electrode 56 is formed on the organic EL layer 54. The organic EL layer 54 contacts the first electrode 48 through the open portion of the insulating interlayer 50. The first and second electrodes 48 and 56 and the organic EL layer 54 interposed therebetween constitute an organic EL diode “DEL.”
In an organic EL device according to the related art, an array layer and an organic EL diode are formed on a first substrate, and an additional second substrate is attached with the first substrate for encapsulation. However, when the array layer and the organic EL diode are formed on one substrate in such a manner, production yield of the organic EL device is determined by multiplying the TFT's yield with the organic EL diode's yield. Since the organic EL diode's yield is relatively low, the production yield of the overall EL device is limited by the organic EL diode's yield. For example, even when a TFT is well fabricated, an organic EL device using a thin film of about 1000 Å thickness can be judged as bad due to defects in an organic EL layer. This results in loss of material and increased production cost.
In general, organic EL devices are classified into bottom emission types and top emission types according to an emission direction of light used for displaying images through the organic EL devices. Bottom emission type organic EL devices have the advantages of high encapsulation stability and high process flexibility. However, the bottom emission type organic EL devices are ineffective for high resolution devices because they have poor aperture ratios. In contrast, top emission type organic EL devices have a higher expected life span because they are more easily designed and they have a high aperture ratio. However, in top emission type organic EL devices, the cathode is generally formed on an organic EL layer. As a result, transmittance and optical efficiency of top emission type organic EL devices are reduced because a limited number of materials may be selected. If a thin film-type passivation layer is formed to prevent a reduction of the light transmittance, the thin film-type passivation layer may fail to prevent infiltration of exterior air into the device.